Currently, the QPSK is widely used as a digital modulation method. For example, RCR STD-28 standard for Personal Handyphone System (PHS) stipulates that the .pi./4-shift QPSK should be used as a modulation method. The QPSK including the .pi./4-shift QPSK is a modulation method in which two bits of data are transferred simultaneously by using the inphase (I-phase) component and quadrature-phase (Q-phase) component of a carrier wave.
Given below is the description of the .pi./4-shift QPSK and conventional .pi./4-shift QPSK modulating apparatus 600.
.pi.4-shift QPSK modulating apparatus receives a baseband signal as serial data. The baseband signal is converted through series-to-parallel conversion into a symbol (X.sub.k,Y.sub.k) which is a piece of two-bit parallel data, where "k" represents a natural number, indicating that "(X.sub.k,Y.sub.k)" is the k-th symbol. The symbol (X.sub.k,Y.sub.k) is converted by a differential encoding circuit into a quadrature signal (I.sub.k,Q.sub.k) This conversion is performed based on the following formula: ##EQU1## where .DELTA..phi.(X.sub.k,Y.sub.k) has values shown in the following table:
TABLE 1 ______________________________________ X.sub.k 1 0 0 1 Y.sub.k 1 1 0 0 .DELTA..phi. -34 34 4 -4 ______________________________________
The quadrature signal (I.sub.k,Q.sub.k) obtained in this way is passed through a lowpass filter to have a limited band and to be converted into I-phase and Q-phase components. A modulating circuit provides the inphase and quadrature-phase components for a wireless circuit.
FIG. 1 shows symbols (X.sub.k,Y.sub.k) mapped on a two-dimensional I-Q coordinate. By focusing on the movement of a signal point represented by a quadrature signal (I.sub.k,Q.sub.k), it is found that the signal point becomes any of signal points A-D and any of signal points E-H alternately. As is apparent from FIG. 1, signal points A-D are represented by a two-dimensional coordinate system represented by vector I.alpha. on the I-axis and vector Q.alpha. on the Q-axis as the axes. Also, signal points E-H are represented by a two-dimensional coordinate system represented by vector I.beta. and vector Q.beta. as the axes, which are respectively equivalent to vectors I.alpha. and Q.alpha. rotated by .pi./4. For example, suppose a current baseband signal is a piece of information represented by symbol point F. Then, "0" is given as its I.alpha. coordinate, "0" as its Q.alpha. coordinate, "-1" as its I.beta. coordinate, and "+1" as its Q.beta. coordinate.
Suppose the coordinates of the k-th symbol using the above four vectors are respectively I.sub..alpha., Q, I, and Q.sub.k. Then, the quadrature coordinates of k-th symbol, I.sub.k and Q.sub.k, are represented by Formulae 2 and 3 respectively. ##EQU2##
Accordingly, I-phase signal I(t) and Q-phase signal Q(t) output from the modulating circuit are represented by Formula 4 in which h(t) represents a rectangular waveform response function used in the lowpass filter. ##EQU3##
Formulae 4 and 5 indicate that limiting the bands of quadrature signals I.sub.k and Q.sub.k may be achieved by limiting bands of each term of Formulae 2 and 3.
Here, if it is supposed that in FIG. 1, symbol points A-D are odd and symbol points E-H are even in order, the following formulae are given. ##EQU4## Hence, I(t) and Q(t) are represented by the following formulae. ##EQU5##
As apparent from the above formulae, of symbols I.sub..alpha.k, Q.sub..alpha., I, and Q being four vectors of signals I(t) and Q(t), I and Q.sub..quadrature.k may be represented by using only odd symbol signals, and I.sub..beta. and Q.sub..beta.k by using only even symbol signals.
FIG. 2 is a block diagram showing the construction of the conventional .pi./4-shift QPSK modulating apparatus 600.
.pi.4-shift QPSK modulating apparatus 600 includes input terminal 601, symbol generating circuit 602, mapping circuit 603, timing generating circuit 605, coordinate accumulators 606, 607, 608, and 609, first storage unit 610, second storage unit 611, third storage unit 612, fourth storage unit 613, subtractor 614, adders 615, 616, and 617, D/A converters 618 and 619, and output terminals 620 and 621. Mapping circuit 603 includes differential encoding circuit 604.
The baseband signal that is to be modulated is serially input to symbol generating circuit 602 through input terminal 601.
Symbol generating circuit 602 is achieved by a .pi./4-shift register. Symbol generating circuit 602 receives a baseband signal with the timing of clock CL1 provided by timing generating circuit 605, and converts the received baseband signal through series-to-parallel conversion into a symbol (X.sub.k,Y), which is a two-bit parallel signal.
Mapping circuit 603 receives the symbol (X.sub.k,Y.sub.k) generated by symbol generating circuit 602 with the timing of clock CL2 provided by timing generating circuit 605. Mapping circuit 603 performs, to generate a piece of two-bit address data, a certain mapping based on the received symbol (X.sub.k,Y.sub.k) or a result of differential encoding. Mapping circuit 603 provides one bit of the piece of two-bit address data for each of coordinate accumulators 606 and 607 with odd symbol timing, and the other bit of the two-bit address data for each of coordinate accumulators 608 and 609 with even symbol timing.
Differential encoding circuit 604, if necessary, performs differential encoding using the received symbol (X.sub.k,Y.sub.k) and the preceding symbol (X.sub.k-1,Y) with the timing of clock CL2 provided by timing generating circuit 605.
Timing generating circuit 605 generates timing signals for entire .pi./4-shift QPSK modulating apparatus 600 based on a clock signal having a higher frequency than that of the baseband signal. CL1 is a clock signal having the same frequency as that of the baseband signal. CL2 is a clock signal having the same frequency as that of symbol data. CL3 is a clock signal having the same frequency as that of symbol data and generates even and odd symbol timing. Timing generating circuit 605 generates elapsed-time information of even and odd symbol periods and provides the information as a lower address for first storage unit 610, second storage unit 611, third storage unit 612, and fourth storage unit 613.
Coordinate accumulators 606, 607, 608, and 609 are sift registers and converts in series and parallel each of the addresses provided by mapping circuit 603. Outputs from coordinate accumulators 606, 607, 608, and 609 are respectively provided for first storage unit 610, second storage unit 611, third storage unit 612, and fourth storage unit 613.
First storage unit 610 receives an output from coordinate accumulator 606 as a higher address and elapsed-time information from timing generating circuit 605 as a lower address. First storage unit 610 prestores waveform data corresponding to I-coordinates (I-components). The waveform data indicates response waveforms from the lowpass filter at the time when .+-.1 is input to the lowpass filter with odd symbol timing, and a response waveform from the lowpass filter when 0 is input with even symbol timing. Accordingly, first storage unit 610 prestores a digital value corresponding to ".SIGMA.I.sub..alpha.2N+1 h{t-(2N+1)T}" in Formula 8.
Second storage unit 611 receives an output from coordinate accumulator 607 as a higher address and elapsed-time information from timing generating circuit 605 as a lower address. Second storage unit 611 prestores waveform data corresponding to Q-coordinates (Q-components). The waveform data indicates response waveforms from the lowpass filter at the time when .+-.1 is input to the lowpass filter with odd symbol timing, and a response waveform when 0 is input with even symbol timing. Accordingly, second storage unit 611 stores a digital value corresponding to ".SIGMA.Q.sub..alpha.2N+1 h{t-(2N+1)T}" in Formula 9.
Third storage unit 612 receives an output from coordinate accumulator 608 as a higher address and elapsed-time information from timing generating circuit 605 as a lower address. Third storage unit 612 prestores waveform data corresponding to I-coordinates (I-components). The waveform data indicates 1/.sqroot. 2 response waveforms from the lowpass filter (in the present specification, square root of 2 is represented by .sqroot. 2) at the time when .+-.1 is input to the lowpass filter with even symbol timing, and a 1/.sqroot. 2 response waveform when 0 is input with odd symbol timing. Accordingly, third storage unit 612 stores a digital value corresponding to ".SIGMA.(1/.sqroot. 2)I.sub..beta.2N h(t-2NT)" in Formulae 8 and 9.
Fourth storage unit 613 stores an output from coordinate accumulator 609 as a higher address and elapsed-time information from timing generating circuit 605 as a lower address and stores waveform data corresponding to Q-coordinates (Q-components). The waveform data indicates 1/.sqroot. 2 response waveforms from the lowpass filter at the time when .+-.1 is input to the lowpass filter with even symbol timing, and a 1/.sqroot. 2 response waveform when 0 is input with odd symbol timing. Accordingly, fourth storage unit 613 stores a digital value corresponding to ".SIGMA.(1/.sqroot. 2)Q.sub..beta. h(t-2NT)" in Formulae 8 and 9.
Subtractor 614 subtracts the output of fourth storage unit 613 from the output of third storage unit 612 to execute a subtraction of the third term from the second term in Formula 8.
Adder 615 adds the outputs of third and fourth storage units 613 and 614 to execute an addition of the second and third terms in Formula 9.
Adder 616 adds the output of subtracter 614 and the output of first storage unit 610, namely, the first term of Formula 8, and outputs instantaneous value I(t) of I-phase signal in Formula 8.
Adder 617 adds the output of adder 615 and the output of second storage unit 611, namely, the first term of Formula 9, and outputs instantaneous value Q(t) of Q-phase signal in Formula 9.
D/A converter 618 converts the output of adder 616 into the analog signal and outputs the analog signal via output terminal 620 to a mixer that is not shown in the drawing. The mixer multiplies the output of D/A converter 618 by the carrier wave.
D/A converter 619 converts the output of adder 617 into the analog signal and outputs the analog signal via output terminal 621 to another mixer that is not shown in the drawing. This mixer multiplies the output of D/A converter 619 by the carrier wave which is input via a phase shifter. These two quadrature components of the carrier wave generated in this way are added and output to a transmitting circuit not shown in the drawing.
As is apparent from the above description, a response waveform corresponding to ".SIGMA.I.sub..alpha. h{t-(2N+1)T}," namely, the first term in Formula 8, and a response waveform corresponding to ".SIGMA.Q.sub..alpha.2N+1 h{t-(2N+1)T}," namely, the first term in Formula 9, may be generated from the same waveform data. Also, a response waveform corresponding to ".SIGMA.(1/.sqroot. 2)I.sub..beta. h(t-2NT)," namely, the second term in Formulae 8 and 9, and a response waveform corresponding to ".SIGMA.(1/.sqroot. 2)Q.sub..beta. h(t-2NT)," namely, the third term in Formula 8 and 9, may be generated from the same waveform data. That means first storage unit 610 and second storage unit 611 of the conventional .pi./4-shift QPSK modulating apparatus 600 store the same filter data. It is the same with third storage unit 612 and fourth storage unit 613. Generally, such storage units are achieved by ROMs. However, increases in the number and the capacity of ROMs lead to an increase in the circuit scale, which generates a problem in cost and a disadvantage in achieving the circuits in LSI.
Furthermore, transmitting the signal modulated with the above construction with burst transmission causes another problem in that the frequency band of the transmission signal expands due to an enormous spurious emission generated by a steep rise of the transmission signal.
A method for preventing the problem is known in which a certain ramp period is set before and after the transmission of the modulated signal so that the transmission signal rises and falls smoothly according to the envelopes in the ramp periods. This processing is known as ramp processing. In the conventional ramp processing, the amplification factor of the transmission amplifier is smoothly increased or reduced so that the level of the transmission signal smoothly rises and falls. However, it is difficult to change the amplification factor of the transmission amplifier, that is, to correctly change the level of the transmission signal according to the function selected as an optimal ramp waveform. Therefore, it has been difficult to perform the ramp processing accurately.